#ChipScope Core Inserter Project File Version 3.0
#Thu Jan 21 18:29:12 EST 2010
Project.device.designInputFile=C\:\\Documents and Settings\\sxs5464\\Desktop\\RapidFPGA\\code\\Xilinx Projects\\ImagerController\\I2CmasterDemo_cs.ngc
Project.device.designOutputFile=C\:\\Documents and Settings\\sxs5464\\Desktop\\RapidFPGA\\code\\Xilinx Projects\\ImagerController\\I2CmasterDemo_cs.ngc
Project.device.deviceFamily=13
Project.device.enableRPMs=true
Project.device.outputDirectory=C\:\\Documents and Settings\\sxs5464\\Desktop\\RapidFPGA\\code\\Xilinx Projects\\ImagerController\\_ngo
Project.device.useSRL16=true
Project.filter.dimension=9
Project.filter<0>=*delay*
Project.filter<1>=*ack*
Project.filter<2>=*ack
Project.filter<3>=ack
Project.filter<4>=
Project.filter<5>=*send*
Project.filter<6>=*send
Project.filter<7>=send
Project.filter<8>=*data*
Project.icon.boundaryScanChain=1
Project.icon.disableBUFGInsertion=false
Project.icon.enableExtTriggerIn=false
Project.icon.enableExtTriggerOut=false
Project.icon.triggerInPinName=
Project.icon.triggerOutPinName=
Project.unit.dimension=1
Project.unit<0>.clockChannel=FPGA_Clk_BUFGP
Project.unit<0>.clockEdge=Rising
Project.unit<0>.dataChannel<0>=UUT/nstate_FFd1
Project.unit<0>.dataChannel<10>=UUT/ack_count<0>
Project.unit<0>.dataChannel<11>=UUT/ack_count<1>
Project.unit<0>.dataChannel<12>=UUT/ack_count<2>
Project.unit<0>.dataChannel<13>=UUT/ack_count<3>
Project.unit<0>.dataChannel<14>=UUT/ack_count<4>
Project.unit<0>.dataChannel<15>=UUT/ack_count<5>
Project.unit<0>.dataChannel<16>=UUT/ack_count<6>
Project.unit<0>.dataChannel<17>=UUT/ack_count<7>
Project.unit<0>.dataChannel<18>=UUT/ack_count<8>
Project.unit<0>.dataChannel<19>=UUT/ack_count<9>
Project.unit<0>.dataChannel<1>=UUT/nstate_FFd4
Project.unit<0>.dataChannel<20>=UUT/ack_count<10>
Project.unit<0>.dataChannel<21>=UUT/ack_count<11>
Project.unit<0>.dataChannel<22>=UUT/delay_count<0>
Project.unit<0>.dataChannel<23>=UUT/delay_count<1>
Project.unit<0>.dataChannel<24>=UUT/delay_count<2>
Project.unit<0>.dataChannel<25>=UUT/delay_count<3>
Project.unit<0>.dataChannel<26>=UUT/delay_count<4>
Project.unit<0>.dataChannel<27>=UUT/delay_count<5>
Project.unit<0>.dataChannel<28>=UUT/delay_count<6>
Project.unit<0>.dataChannel<29>=UUT/delay_count<7>
Project.unit<0>.dataChannel<2>=UUT/nstate_FFd5
Project.unit<0>.dataChannel<30>=UUT/delay_count<8>
Project.unit<0>.dataChannel<31>=UUT/delay_count<9>
Project.unit<0>.dataChannel<32>=UUT/delay_count<10>
Project.unit<0>.dataChannel<33>=UUT/delay_count<11>
Project.unit<0>.dataChannel<34>=UUT/delay_count<12>
Project.unit<0>.dataChannel<35>=UUT/delay_count<13>
Project.unit<0>.dataChannel<36>=UUT/delay_count<14>
Project.unit<0>.dataChannel<37>=UUT/delay_count<15>
Project.unit<0>.dataChannel<3>=UUT/nstate_FFd6
Project.unit<0>.dataChannel<4>=UUT/nstate_FFd7
Project.unit<0>.dataChannel<5>=UUT/nstate_FFd8
Project.unit<0>.dataChannel<6>=UUT/nstate_FFd9
Project.unit<0>.dataChannel<7>=UUT/Mtridata_in_i2c
Project.unit<0>.dataChannel<8>=CLK/sI2C_Clk
Project.unit<0>.dataChannel<9>=SW_3_IBUF
Project.unit<0>.dataDepth=4096
Project.unit<0>.dataEqualsTrigger=true
Project.unit<0>.dataPortWidth=38
Project.unit<0>.enableGaps=false
Project.unit<0>.enableStorageQualification=true
Project.unit<0>.enableTimestamps=false
Project.unit<0>.timestampDepth=0
Project.unit<0>.timestampWidth=0
Project.unit<0>.triggerChannel<0><0>=UUT/nstate_FFd1
Project.unit<0>.triggerChannel<0><1>=UUT/nstate_FFd4
Project.unit<0>.triggerChannel<0><2>=UUT/nstate_FFd5
Project.unit<0>.triggerChannel<0><3>=UUT/nstate_FFd6
Project.unit<0>.triggerChannel<0><4>=UUT/nstate_FFd7
Project.unit<0>.triggerChannel<0><5>=UUT/nstate_FFd8
Project.unit<0>.triggerChannel<0><6>=UUT/nstate_FFd9
Project.unit<0>.triggerChannel<1><0>=UUT/Mtridata_in_i2c
Project.unit<0>.triggerChannel<2><0>=CLK/sI2C_Clk
Project.unit<0>.triggerChannel<3><0>=SW_3_IBUF
Project.unit<0>.triggerChannel<4><0>=UUT/ack_count<0>
Project.unit<0>.triggerChannel<4><10>=UUT/ack_count<10>
Project.unit<0>.triggerChannel<4><11>=UUT/ack_count<11>
Project.unit<0>.triggerChannel<4><1>=UUT/ack_count<1>
Project.unit<0>.triggerChannel<4><2>=UUT/ack_count<2>
Project.unit<0>.triggerChannel<4><3>=UUT/ack_count<3>
Project.unit<0>.triggerChannel<4><4>=UUT/ack_count<4>
Project.unit<0>.triggerChannel<4><5>=UUT/ack_count<5>
Project.unit<0>.triggerChannel<4><6>=UUT/ack_count<6>
Project.unit<0>.triggerChannel<4><7>=UUT/ack_count<7>
Project.unit<0>.triggerChannel<4><8>=UUT/ack_count<8>
Project.unit<0>.triggerChannel<4><9>=UUT/ack_count<9>
Project.unit<0>.triggerChannel<5><0>=UUT/delay_count<0>
Project.unit<0>.triggerChannel<5><10>=UUT/delay_count<10>
Project.unit<0>.triggerChannel<5><11>=UUT/delay_count<11>
Project.unit<0>.triggerChannel<5><12>=UUT/delay_count<12>
Project.unit<0>.triggerChannel<5><13>=UUT/delay_count<13>
Project.unit<0>.triggerChannel<5><14>=UUT/delay_count<14>
Project.unit<0>.triggerChannel<5><15>=UUT/delay_count<15>
Project.unit<0>.triggerChannel<5><1>=UUT/delay_count<1>
Project.unit<0>.triggerChannel<5><2>=UUT/delay_count<2>
Project.unit<0>.triggerChannel<5><3>=UUT/delay_count<3>
Project.unit<0>.triggerChannel<5><4>=UUT/delay_count<4>
Project.unit<0>.triggerChannel<5><5>=UUT/delay_count<5>
Project.unit<0>.triggerChannel<5><6>=UUT/delay_count<6>
Project.unit<0>.triggerChannel<5><7>=UUT/delay_count<7>
Project.unit<0>.triggerChannel<5><8>=UUT/delay_count<8>
Project.unit<0>.triggerChannel<5><9>=UUT/delay_count<9>
Project.unit<0>.triggerConditionCountWidth=0
Project.unit<0>.triggerMatchCount<0>=1
Project.unit<0>.triggerMatchCount<1>=1
Project.unit<0>.triggerMatchCount<2>=1
Project.unit<0>.triggerMatchCount<3>=1
Project.unit<0>.triggerMatchCount<4>=1
Project.unit<0>.triggerMatchCount<5>=1
Project.unit<0>.triggerMatchCountWidth<0><0>=0
Project.unit<0>.triggerMatchCountWidth<1><0>=0
Project.unit<0>.triggerMatchCountWidth<2><0>=0
Project.unit<0>.triggerMatchCountWidth<3><0>=0
Project.unit<0>.triggerMatchCountWidth<4><0>=0
Project.unit<0>.triggerMatchCountWidth<5><0>=0
Project.unit<0>.triggerMatchType<0><0>=0
Project.unit<0>.triggerMatchType<1><0>=0
Project.unit<0>.triggerMatchType<2><0>=1
Project.unit<0>.triggerMatchType<3><0>=0
Project.unit<0>.triggerMatchType<4><0>=0
Project.unit<0>.triggerMatchType<5><0>=0
Project.unit<0>.triggerPortCount=6
Project.unit<0>.triggerPortIsData<0>=true
Project.unit<0>.triggerPortIsData<1>=true
Project.unit<0>.triggerPortIsData<2>=true
Project.unit<0>.triggerPortIsData<3>=true
Project.unit<0>.triggerPortIsData<4>=true
Project.unit<0>.triggerPortIsData<5>=true
Project.unit<0>.triggerPortWidth<0>=7
Project.unit<0>.triggerPortWidth<1>=1
Project.unit<0>.triggerPortWidth<2>=1
Project.unit<0>.triggerPortWidth<3>=1
Project.unit<0>.triggerPortWidth<4>=12
Project.unit<0>.triggerPortWidth<5>=16
Project.unit<0>.triggerSequencerLevels=16
Project.unit<0>.triggerSequencerType=1
Project.unit<0>.type=ilapro
